A thermal-aware ILP-based algorithm in behavioral synthesis

In this paper, an integer linear programming (ILP)-based algorithm in behavioral synthesis procedure was proposed to low down the peak temperature of chip and guarantee the performance of circuit. It has been founded on the observation that different behavioral synthesis results will significantly affect the power dissipation of functional units, which will further affect the thermal distribution of the chip. In order to avoid the overheating in one cycle or on one module, the concepts of peak cycle power and peak module power are introduced to restrict the maximum power dissipation in both the temporal aspect and the spatial aspect. ILP formulations were modeled and constructed under the multiple supply voltages and multicycling scheme, which needs the support of parameterized functional units library. Experimental results on benchmarks indicate that with the consideration of thermal-aware behavioral synthesis, our ILP-based algorithm on average reduces the peak temperature of functional units by 13.9degC when compared to the thermal unaware synthesis flow.