DocumentCode :
2572118
Title :
The research and implement of an advanced function coverage based verification environment
Author :
Yang, Runshan ; Wu, Liji ; Guo, Jun ; Liu, Baorong
Author_Institution :
Tsinghua Univ., Beijing
fYear :
2007
fDate :
22-25 Oct. 2007
Firstpage :
1253
Lastpage :
1256
Abstract :
This paper developed an advanced function coverage-directed reusable ASIC verification environment with automatic verification vectors generation. A layered architecture is adopted for reusing; the verification vectors are randomly generated and the simulation results can be checked automatically. Further more, genetic algorithm is employed to improve the efficiency of the verification vectors generation. The result of experiments performed on a smart card showed this method to be effective and efficient.
Keywords :
application specific integrated circuits; genetic algorithms; advanced function coverage; automatic verification vectors generation; genetic algorithm; layered architecture; Application specific integrated circuits; Biological cells; Debugging; Genetic algorithms; Large-scale systems; Microelectronics; Silicon; Smart cards; System testing; Writing; function coverage; genetic algorithm; reusability; verification; verification vectors automatic generation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
Type :
conf
DOI :
10.1109/ICASIC.2007.4415863
Filename :
4415863
Link To Document :
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