Quasi-3D device simulation for microwave noise characterization of MOS devices

Author

Yi Lin ; Lan Wang ; Obrecht, R. ; Manku, T.

Author_Institution

Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada

fYear

1998

fDate

6-9 Dec. 1998

Firstpage

77

Lastpage

80

Abstract

We report a quasi 3-D MOS noise simulation method which accurately predicts the microwave noise performance of MOS transistors. This method inherently takes into account all the microscopic noise sources within the transistor at microwave frequencies. A 0.5 /spl mu/m LDD nMOS transistor was simulated and the simulation results were compared to measurement data. The behavior of the microwave noise parameters (i.e. F/sub min/, R/sub opt/, X/sub opt/, and R/sub n/) with bias and layout parameters are also presented.

Keywords

MOSFET; microwave field effect transistors; semiconductor device models; semiconductor device noise; simulation; 0.5 micron; LDD nMOS transistor; MOS device simulation; MOS transistors; bias parameters; layout parameters; microwave noise characterization; quasi-3D device simulation; CMOS technology; Circuit noise; Circuit simulation; Computational modeling; MOS devices; MOSFET circuits; Microwave devices; Noise level; Predictive models; Radio frequency;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-4774-9

Type

conf

DOI

10.1109/IEDM.1998.746280

Filename

746280