DocumentCode :
2572354
Title :
Revising link capacity adjustment scheme for ASIC applications
Author :
Wang, Peng ; Wang, Biao ; Jin, Depeng ; Zeng, Lieguang
Author_Institution :
Nat. High-performance IC Design Center, Shanghai
fYear :
2007
fDate :
22-25 Oct. 2007
Firstpage :
1309
Lastpage :
1312
Abstract :
Link Capacity Adjustment Scheme (LCAS) is a protocol in synchronous digital hierarchy (SDH) that provides hitless bandwidth adjustment of virtual concatenated (VCAT) signal under the control of network management system (NMS). With LCAS, SDH network thus can dynamically assign resources to meet the requirements of its subscribers. However, LCAS is a two-way handshake signaling with status messages exchanged continuously, which is difficult to be implemented within a single chip. To achieve an easier ASIC implementation, we revise the LCAS protocol to have a shorter handshaking procedure by adding MST bits in the reserved K4 bits and removing the complex mappings between TU12s and theirs SQs. Simulation results show that the revised LCAS shortens the period of handshaking greatly and synthesis results show that the size of logic is reduced effectively. We believe the new scheme as a protocol will be accepted and applied in future.
Keywords :
application specific integrated circuits; protocols; ASIC applications; link capacity adjustment scheme protocol; network management system; synchronous digital hierarchy; two-way handshake signaling; virtual concatenated signal; Application specific integrated circuits; Bandwidth; Concatenated codes; Containers; Costs; Design engineering; Ethernet networks; Logic; Protocols; Synchronous digital hierarchy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
Type :
conf
DOI :
10.1109/ICASIC.2007.4415877
Filename :
4415877
Link To Document :
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