• DocumentCode
    2572472
  • Title

    Ultra-thin gate oxides-performance and reliability

  • Author

    Iwai, H. ; Momose, H.S.

  • Author_Institution
    Microelectron. Eng. Lab., Toshiba Corp., Kawasaki, Japan
  • fYear
    1998
  • fDate
    6-9 Dec. 1998
  • Firstpage
    163
  • Lastpage
    166
  • Abstract
    Gate oxide thinning accompanied by the CMOS downsizing is expected to reach a direct-tunneling leakage current regime at the generations of 0.1 /spl mu/m and below. This has been regarded as one of the limiting factors of CMOS progress in terms of performance. Recently, the studies of the direct tunneling gate oxide have been carried out aggressively. In this paper, the results of these studies are reviewed and future prospects for the gate oxides are predicted.
  • Keywords
    CMOS integrated circuits; insulating thin films; integrated circuit reliability; leakage currents; tunnelling; CMOS downsizing; direct-tunneling leakage current regime; gate oxide thinning; limiting factors; reliability; ultra-thin gate oxides; DC generators; Fabrication; Insulation; Laboratories; Leakage current; MOSFET circuits; Microelectronics; Reliability engineering; Thin film transistors; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0163-1918
  • Print_ISBN
    0-7803-4774-9
  • Type

    conf

  • DOI
    10.1109/IEDM.1998.746307
  • Filename
    746307