DocumentCode
2572630
Title
Evaluating application mapping using network simulation
Author
Salminen, Tommi ; Soininen, Juha-Pekka
Author_Institution
VTT Electron., Oulu, Finland
fYear
2003
fDate
19-21 Nov. 2003
Firstpage
27
Lastpage
30
Abstract
The quality of the mapping decisions made when selecting computation and storage resources for different parts of an application to be executed on a network on chip (NoC) has a high impact on the overall system performance. A network simulator is needed to be able to test different mapping configurations. This paper presents such a simulator and demonstrates how it can be used to compare different kinds of application mappings.
Keywords
circuit CAD; circuit simulation; integrated circuit modelling; system-on-chip; NoC; application mapping; computation resources; mapping configurations; mapping decisions; network on chip; network simulation; network simulator; storage resources; system performance; Clocks; Communication networks; Communication switching; Computational modeling; Computer networks; Embedded computing; Network-on-a-chip; Packet switching; Switches; System performance;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip, 2003. Proceedings. International Symposium on
Print_ISBN
0-7803-8160-2
Type
conf
DOI
10.1109/ISSOC.2003.1267709
Filename
1267709
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