Twisted differential on-chip interconnect architecture for inductive/capacitive crosstalk noise cancellation

A simple generic interconnect architecture is presented to allow effective cancellation of inductive and capacitive noise in high-speed on-chip interconnect lines. The approach is based on the principle of constructing periodically twisted differential line pairs for parallel interconnect segments in order to eliminate the mutual coupling influences. Detailed 3-D simulations show that a crosstalk noise reduction of up to 60 dB is achievable with this approach.