Within-chip variability analysis

Current, integrated circuits are large enough that device and interconnect parameter variations within it chip are as important as those same variations from chip to chip. Previously, digital designers were concerned only with chip-to-chip variability, for which analysis techniques exist; concern for within-chip variations has been in the domain of analog circuit design. In this paper, we lay the groundwork needed to analyze the impact of inter-chip variations on digital circuits and propose an extreme-case analysis algorithm to efficiently determine the worst case performance due to such variability.