A fast 3D modeling approach to parasitics extraction of bonding wires for RF circuits

Author

Xiaoning Qi ; Yue, C.P. ; Amborg, T. ; Soh, H.T. ; Zhiping Yu ; Dutton, R.W. ; Sakai, H.

Author_Institution

Center for Integrated Syst., Stanford Univ., CA, USA

fYear

1998

fDate

6-9 Dec. 1998

Firstpage

299

Lastpage

302

Abstract

An approach to fast 3D modeling of the geometry for bonding wires in RF circuits and packages is demonstrated. The geometry can readily be used to extract electrical parameters such as inductance and capacitance. An equivalent circuit is presented to model the frequency response of bonding wires. To verify simulation accuracy, test structures have been designed and measured. Excellent agreement between simulated and measured data is demonstrated up to 10 GHz.

Keywords

VLSI; capacitance; circuit simulation; equivalent circuits; frequency response; inductance; integrated circuit design; integrated circuit modelling; integrated circuit packaging; lead bonding; 0 to 10 GHz; 3D modeling approach; RF circuits; bonding wires; capacitance; electrical parameters; equivalent circuit; frequency response; inductance; parasitics extraction; simulation accuracy; test structures; Bonding; Circuit simulation; Data mining; Geometry; Inductance; Packaging; Parasitic capacitance; Radio frequency; Solid modeling; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-4774-9

Type

conf

DOI

10.1109/IEDM.1998.746359

Filename

746359