DocumentCode
2573506
Title
A new dynamic-threshold SOI device having an embedded resistor and a merged body-bias-control transistor
Author
Horiuchi, M.
Author_Institution
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
fYear
1998
fDate
6-9 Dec. 1998
Firstpage
419
Lastpage
422
Abstract
An embedded resistor just under the source junction and a small subsidiary body-bias-control transistor enables construction of a variable-threshold SOI-MOSFET with a small area penalty and without any limitation on the power-supply voltage. In the primary transistor, this resistor not only controls the body potential to increase the on-current and decrease the off-current under the AC condition, but also eliminates floating-body effects. The inverter delay time with and without a 1 pF load capacitance can be shortened to 55% and 40%, respectively, of that of a bulk device under 1 V operation.
Keywords
CMOS integrated circuits; MOSFET; high-speed integrated circuits; low-power electronics; silicon-on-insulator; 1 V; AC condition; Si; dynamic-threshold SOI device; embedded resistor; floating-body effects elimination; inverter delay time; merged body-bias-control transistor; source junction; variable-threshold SOI-MOSFET; CMOSFETs; Capacitance; Circuits; Current supplies; Delay effects; Inverters; Laboratories; Resistors; Subthreshold current; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Print_ISBN
0-7803-4774-9
Type
conf
DOI
10.1109/IEDM.1998.746388
Filename
746388
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