• DocumentCode
    2573927
  • Title

    Electronic package thermal design using boundary elements

  • Author

    Liu, Joshua C. ; Hunter, Daniel E. ; Kozerek, R.L.

  • Author_Institution
    Aluminium Corp. of America, Alcoa Center, PA, USA
  • fYear
    1990
  • fDate
    6-8 Feb 1990
  • Firstpage
    65
  • Lastpage
    69
  • Abstract
    The use of the boundary-element method (BEM) for thermal evaluation of electronic packaging systems is discussed. Over the last twenty years, computer-aided engineering analysts have relied heavily on the finite-element method (FEM) for solving a variety of problems. This includes 2-D and 3-D linear or nonlinear heat transfer models on IC packages. However, the BEM, which discretizes only the problem boundary, provides a potentially faster method of modeling a problem. For 3-D models, in particular, parametric variations on a particular design can be evaluated more rapidly. This decreasing turnaround time will become a priority in future analyses of more sophisticated VLSI (very large scale integration) or PGA (pin grid array) packages which require design optimization on size and space arrangement for higher power capacity. BEM thermal models of 2-D and 3-D PGA packages were studied using the computer code BEASY. BEM results were compared to those of FEM models. A 3-D benchmark problem with documented experimental data was modeled to verify the BEM results
  • Keywords
    CAD; VLSI; boundary-elements methods; packaging; 3-D benchmark problem; 3-D models; BEM thermal models; IC packages; PGA packages; VLSI; boundary-element method; computer code BEASY; computer-aided engineering; design optimization; electronic packaging systems; experimental data; finite-element method; higher power capacity; models; package thermal design; parametric variations; pin grid array; thermal evaluation; turnaround time; very large scale integration; Boundary element methods; Electronic packaging thermal management; Electronics packaging; Finite element methods; Grid computing; Heat transfer; Integrated circuit modeling; Integrated circuit packaging; Process design; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Thermal and Temperature Measurement Symposium, 1990. SEMI-THERM VI, Proceedings., Sixth Annual IEEE
  • Conference_Location
    Phoenix, AZ
  • Type

    conf

  • DOI
    10.1109/STHERM.1990.68492
  • Filename
    68492