A low-power implementation of arctangent function for communication applications using FPGA

Author

Saber, M. ; Jitsumatsu, Yutaka ; Kohda, T.

Author_Institution

Comput. Sci. & Comm. Dep., Kyushu Univ., Fukuoka, Japan

fYear

2009

fDate

19-23 Oct. 2009

Firstpage

60

Lastpage

63

Abstract

A low power architecture to compute arctangent function which is suitable for broad-band communication applications is presented. This architecture aims to avoid high power consumption and long latency which are the main disadvantages to other methods based on CORDIC algorithm or conventional LUT methods or polynomial approximation. The architecture is implemented using FPGA, computes arctangent function with 3 clock pulses, and it is power dissipation is lower than Cordic algorithm by 80%.

Keywords

digital radio; field programmable gate arrays; polynomial approximation; software radio; CORDIC algorithm; FPGA; LUT methods; arctangent function; broadband communication applications; coordinate rotation digital computer algorithm; polynomial approximation; power dissipation; Approximation algorithms; Broadband communication; Clocks; Computer architecture; Delay; Energy consumption; Field programmable gate arrays; Polynomials; Power dissipation; Table lookup;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Design and its Applications in Communications, 2009. IWSDA '09. Fourth International Workshop on

Conference_Location

Fukuoka

Print_ISBN

978-1-4244-4379-6

Electronic_ISBN

978-1-4244-4380-2

Type

conf

DOI

10.1109/IWSDA.2009.5346438

Filename

5346438