DocumentCode

2574078

Title

Wire Segmenting For Improved Buffer Insertion

Author

Alpert, Charles ; Devgan, Anirudh

Author_Institution

IBM Austin Research Laboratory, Austin, TX 78758

fYear

1997

fDate

9-13 June 1997

Firstpage

588

Lastpage

593

Keywords

Central Processing Unit; Delay; Heuristic algorithms; Integrated circuit interconnections; Laboratories; Libraries; Permission; Routing; Topology; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1997. Proceedings of the 34th

Conference_Location

Anaheim, CA, USA

ISSN

0738-100X

Print_ISBN

0-7803-4093-0

Type

conf

DOI

10.1109/DAC.1997.597214

Filename

597214