A study of ultra shallow junction and tilted channel implantation for high performance 0.1 /spl mu/m pMOSFETs

The impact of ultra-shallow junction and tilted channel implantation (TCI) is discussed with respect to source/drain resistance (R/sub sd/), and short-channel effect (SCE) based on physical gate length (L/sub gate/) and effective gate length (L/sub eff/). We obtained the following results: (1) A shallower junction improves the SCE immunity for a given L/sub gate/, but not with respect to L/sub eff/. (2) The essential factor for the reduction of R/sub sd/ is not the sheet resistance (R/sub sheet/) of source/drain (S/D) extensions, but the junction tailing profile. (3) TCI was found to be effective for increasing the current drive ability due to the reduced L/sub eff/ for a given off current (I/sub off/). (4) The effectiveness of TCI was confirmed by a CV L/sub eff/ extraction method. (5) Encouraged by the above results, high-performance 0.1 /spl mu/m pMOSFETs were demonstrated using a 1 keV, B/sup +/ or BF/sub 2//sup +/ implantation and TCI technology. The device achieved a high drive current (I/sub drive/) of 360 /spl mu/A//spl mu/m (@V/sub g/=V/sub d/=1.5 V, I/sub off/=1nA//spl mu/m).