DocumentCode
2574587
Title
A new generation of high voltage MOSFETs breaks the limit line of silicon
Author
Deboy, G. ; Marz, N. ; Stengl, J.-P. ; Strack, H. ; Tihanyi, J. ; Weber, H.
Author_Institution
Semicond. Div., Siemens AG, Munich, Germany
fYear
1998
fDate
6-9 Dec. 1998
Firstpage
683
Lastpage
685
Abstract
For the first time a new device concept for high voltage power devices has been realized in silicon. Our 600 V-COOLMOS/sup TM/ reaches an area specific on-resistance of typically 3.5 /spl Omega//spl middot/mm/sup 2/. Our technology thus offers a shrink factor of 5 versus the actual state of the art in power MOSFETs. The device concept is based on charge compensation in the drift region of the transistor. We increase the doping of the vertical drift region roughly by one order of magnitude and counterbalance this additional charge by the implementation of fine structured columns of the opposite doping type. The blocking voltage of the transistor remains thus unaltered. The charge compensating columns do not contribute to the current conduction during the turn-on state. Nevertheless the drastically increased doping of the drift region allows the above mentioned reduction of the on-resistance.
Keywords
charge compensation; power MOSFET; 600 V; COOLMOS transistor; Si; blocking voltage; charge compensation; drift region doping; high voltage MOSFET; on-resistance; shrink factor; silicon power device; Boron; Doping; Epitaxial growth; Epitaxial layers; MOSFETs; Phosphors; Silicon; Space charge; Transistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Print_ISBN
0-7803-4774-9
Type
conf
DOI
10.1109/IEDM.1998.746448
Filename
746448
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