A fast algorithm and hardware implementation for rate-distortion optimization in JPEG2000

Author

Huai-Yu, Zhuang ; Cheng-Ke, Wu ; Jia-Xian, Deng

Author_Institution

Nat. Key Lab. of Integrated Service Network, Xidian Univ., Xi´´an

Volume

3

fYear

2004

fDate

30-30 June 2004

Firstpage

1527

Abstract

A fast algorithm for T₂ encoder in JPEG2000 suitable for hardware implementation is presented in this paper, based on the elaborate analysis of a rate-distortion optimization algorithm. By reducing calculative complexity, the difficulty of hardware implementation for the T₂ encoder is reduced, and the parallelizability of the JPEG2000 hardware system is enhanced. The experimental results show that the final code stream is in accordance with the standard format of JPEG2000 and reconstructed image quality decreases little. The system has been implemented on FPGA

Keywords

code standards; data compression; field programmable gate arrays; image coding; image reconstruction; optimisation; rate distortion theory; FPGA; JPEG2000; T₂ encoder; code stream; parallelizability; rate-distortion optimization; reconstructed image quality; Code standards; Discrete wavelet transforms; Equations; Field programmable gate arrays; Hardware; Image coding; Image quality; Image reconstruction; Rate-distortion; Streaming media;

fLanguage

English

Publisher

ieee

Conference_Titel

Multimedia and Expo, 2004. ICME '04. 2004 IEEE International Conference on

Conference_Location

Taipei

Print_ISBN

0-7803-8603-5

Type

conf

DOI

10.1109/ICME.2004.1394537

Filename

1394537