Title :
Analysis And Justification Of A Practical 2 L/2-d Capacitance Extraction Methodology
Author :
Cong, Jason ; Lei Het ; Kahng, Andrew B. ; Noice, David ; Shirali, Nagesh ; Yen, Steve H C
Author_Institution :
Cadence Design Systems, Inc., San Jose, CA 95134
Keywords :
Computer science; Convergence; Iterative methods; Logic; Parasitic capacitance; Permission; Silicon; Technology planning; Very large scale integration; Wires;
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-4093-0
DOI :
10.1109/DAC.1997.597221
