Title :
The best combination of aluminum and copper interconnects for a high performance 0.18 /spl mu/m CMOS logic device
Author :
Igarashi, M. ; Harada, A. ; Amishiro, H. ; Kawashima, H. ; Morimoto, N. ; Kusumi, Y. ; Saito, T. ; Ohsaki, A. ; Mori, T. ; Fukada, T. ; Toyoda, Y. ; Higashitani, K. ; Arima, H.
Author_Institution :
ULSI Dev. Center, Mitsubishi Electr. Corp., Hyogo, Japan
Abstract :
A high performance 0.18 /spl mu/m CMOS logic device has been developed with 0.15 /spl mu/m transistors and six-level interconnects. The multi-level interconnect system consists of a conventional process with Al wire and a dual damascene process with Cu wire. 4-level Al interconnects with fine metal pitch are suitable for short distance wiring such as intra block cell to cell interconnects, whereas 2-level Cu interconnects with coarse metal pitch are used for long distance wiring such as mega block to block interconnects to achieve high-speed and high-density LSI devices.
Keywords :
CMOS logic circuits; aluminium alloys; copper; copper alloys; integrated circuit metallisation; large scale integration; wiring; 0.15 micron; 0.18 micron; AlCu; CMOS logic device; Cu; coarse metal pitch; dual damascene process; fine metal pitch; high-density LSI devices; intra block cell to cell interconnects; long distance wiring; mega block to block interconnects; multi-level interconnect system; short distance wiring; six-level interconnects; Aluminum; Copper; Delay effects; Etching; High-K gate dielectrics; Logic devices; Oxidation; Parasitic capacitance; Wire; Wiring;
Conference_Titel :
Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-4774-9
DOI :
10.1109/IEDM.1998.746483
