100 nm aperture field emitter arrays for low voltage applications

We report the results of experimental and numerical simulation studies of the scaling of field emitter array (FEA) gate apertures to 100 nm. Electrostatic simulation indicate that by scaling the gate aperture, it is possible to fabricate devices that will support flat panel display applications at a gate voltage of 15 V. Devices have been successfully evaluated and performed in agreement with simulation. We demonstrated 100 nm gate aperture FEAs that turned on at gate voltages as low as 12 V and achieved a current density of 10 /spl mu/A/cm/sup 2/ at 17 V. The results also indicate that current density can be modulated by three orders of magnitude with a gate voltage swing of 5 V.