Title :
A design for test method for combination circuit
Author :
Chen, Tingting ; Li, Zheying ; Sun, Wenyong
Author_Institution :
Coll. of Inf., Beijing Union Univ., Beijing, China
Abstract :
Based on analysis of measurability design method for JTAG technology, this paper brings forward a Design for Test (DFT) structure for combination circuit, using Boolean Difference Algorithm to generate the minimum test vectors set. A real combination circuit is taken as an example in this paper to prove the correctness of the DFT method by emulation result.
Keywords :
Boolean algebra; combinational circuits; design for testability; Boolean difference algorithm; JTAG technology; combination circuit; design for test method; measurability design; test vector set; Algorithm design and analysis; Circuit faults; Discrete Fourier transforms; Equations; Integrated circuits; Mathematical model; Testing; Boolean Difference Algorithm; DFTTestbench; JTAG; test vectors;
Conference_Titel :
Computer Science and Service System (CSSS), 2011 International Conference on
Conference_Location :
Nanjing
Print_ISBN :
978-1-4244-9762-1
DOI :
10.1109/CSSS.2011.5972218
