Parametric Study and Optimal Design in Wire Bonding Process for Mini Stack-Die Package

The purpose of this research is to study the parametric factors of wire bonding and optimal design rules for 4-layer mini stack-die package. This paper demonstrates the characteristic of low loop height, fine bond pad pitch and long overhead staggered chip in mini SD package. The loop height is limited to 3.5mil, the diameter of gold wire is 0.8 mil and the bond pad pitch is 45mum. The collaborated relationships among bonding force, bonding time, temperature and thermal-ultrasonic contact pressure have been evaluated to improve the manufacturing process. A three-dimensional solid model of SD card based on finite element ANSYS software is developed to predict the bond pull and ball shear tests and the stress distributions in the overall model. The predicted thermal-induced displacements were found to be very good agreement with the Moire interferometer experimental in-plane u and v deformations. The developed finite element model is then applied to evaluate the reliability of the JEDEC standard JESD22-A104 thermal cycle test. The thermal-induced warpage of SD package is predicted during the process of reflow. The electromagnetic of gold wire in the first bond as well as the second bond is determined. A series of parametric studies have been conducted to validate the developed finite element model in this paper, and the optimizations of manufacturing process are summarized