An advanced flash memory technology on SOI

For the first time, EEPROM functionality is demonstrated on double-poly bitcells on SOI using the same layout as standard bulk CMOS bitcells. By using FN tunneling for program and erase (P/E) operations, the P/E characteristics of the floating-body SOI bitcell are comparable to the bulk CMOS characteristics. Bitcell endurance for SOI cells show significantly less window closure than bulk CMOS cells. High-voltage SOI device characteristics are also compared with bulk devices. With sufficient body contacts, the high-voltage SOI devices can support the required bitcell voltages.