DocumentCode
2578795
Title
Toward Formalizing A Validation Methodology Using Simulation Coverage
Author
Gupta, Aarti ; Malik, Sharad ; Ashar, Pranav
Author_Institution
CCRL, NEC USA
fYear
1997
fDate
9-13 June 1997
Firstpage
740
Lastpage
745
Keywords
Computational modeling; Design automation; Digital signal processing; Distributed computing; Formal verification; Guidelines; Hardware; National electric code; State-space methods; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location
Anaheim, CA, USA
ISSN
0738-100X
Print_ISBN
0-7803-4093-0
Type
conf
DOI
10.1109/DAC.1997.597243
Filename
597243
Link To Document