Abstract :
Four computational circuits realized for MOS technology, implementing multiplier/divider, exponential, squaring functions and Euclidean distance will be presented. The multiplier/divider circuit is designed using bulk-driven subthreshold- operated MOS transistors in order to reduce the circuit complexity and to respond, also, to the low-power requirements. The circuit output current is independent on process parameters. A new method for reducing the approximation error caused by a limited expansion in Taylor series of the exponential function will be presented, having the advantage of obtaining a very good frequency response as a result of the operation in saturation of MOS transistors. The MOS implementation of the squaring function based on a new principle using the arithmetic mean of the input potentials, as well as an original realization of the Euclidean distance function independent on technological parameters will be further described.
Keywords :
CMOS analogue integrated circuits; MOSFET; arithmetic; dividing circuits; low-power electronics; multiplying circuits; Euclidean distance function; MOS devices; Taylor series; arithmetic mean; bulk-driven subthreshold-operated MOS transistors; computational circuits; exponential functions; low-power requirements; multiplier-divider circuit; squaring functions; Approximation error; Arithmetic; Circuits; Complexity theory; Euclidean distance; Frequency response; MOS devices; MOSFETs; Potential well; Taylor series; FGMOS devices; approximation error; bulk-driven subthreshold-operated MOS transistors; limited Taylor series expansion;
