DocumentCode
2581273
Title
Interpolation-based digital quadrature frequency synthesizer
Author
Larson, Ryan ; Lu, Shih-Lien
Author_Institution
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
fYear
2000
fDate
2000
Firstpage
48
Lastpage
52
Abstract
A novel quadrature sinusoid synthesizer is designed. This synthesizer is algorithmic in nature and requires no memory look-up table. Possible uses include conversion in RF based systems. This design is compared with a phase-accumulator based synthesizer and found to be optimal in area, transistor count, and spurious noise
Keywords
CMOS digital integrated circuits; application specific integrated circuits; direct digital synthesis; integrated circuit design; interpolation; 0.5 micron; CMOS ASIC; DDS technique; RF based systems; digital quadrature frequency synthesizer; interpolation-based frequency synthesizer; recursive doubling adder; sinusoid synthesizer; standard cell ASIC technology; Algorithm design and analysis; Capacitance; Circuit synthesis; Difference equations; Frequency synthesizers; Phase locked loops; Radio frequency; Read only memory; Signal synthesis; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International
Conference_Location
Arlington, VA
Print_ISBN
0-7803-6598-4
Type
conf
DOI
10.1109/ASIC.2000.880674
Filename
880674
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