Title :
A CAD tool for system-on-chip placement and routing with free-space optical interconnect
Author :
Seo, Chung-Seok ; Chatterjee, Abhijit
Author_Institution :
Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
A wiring model for system-on-chips utilizing flexible free space optical interconnects is introduced In this paper, we develop a CAD tool for physical placement of modules in system-on-chips manufactured using the optical interconnect technology. The tool also determines which of the interconnect are routed electrically and which are routed optically without exceeding the routing capacity of the optical interconnect while minimizing electrical wire length. About 50% reduction in largest delay of electrical wires is obtained through the use of optical interconnect (Performance improvement by a factor of 2).
Keywords :
circuit layout CAD; optical interconnections; system-on-chip; CAD tool; electrical wire length; free-space optical interconnect; physical placement; system-on-chip placement; system-on-chip routing; wiring model; Computer aided manufacturing; Flexible manufacturing systems; Optical interconnections; Pulp manufacturing; Routing; Space technology; System-on-a-chip; Virtual manufacturing; Wire; Wiring;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
Print_ISBN :
0-7695-1700-5
DOI :
10.1109/ICCD.2002.1106742