DocumentCode
2582027
Title
3.6 GHz highly monotonic digitally controlled oscillator for all-digital phase locked loop
Author
Pokharel, Ramesh K. ; Tomar, Abhishek ; Kanaya, Haruichi ; Yoshida, Keiji
Author_Institution
EJUST Center, Kyushu Univ., Fukuoka, Japan
fYear
2011
fDate
5-10 June 2011
Firstpage
1
Lastpage
4
Abstract
An analytical method to make a trade-off between the tuning range and differential non-linearity (DNL) for a digitally controlled oscillator (DCO) is proposed. To verify the approach, a 12-bit DCO is designed, implemented in 0.18 μm CMOS technology, and tested. The measured DNL was -0.41 Least Significant Bit (LSB) in the worst case without degrading the other parameters which, in turn, results in highly monotonic behavior over the tuning range from 3.12 GHz to 4.15 GHz. The measured phase noise was -135.2 dBc/Hz (@ 4 MHz offset) at oscillation frequency of 3.6 GHz with 19.2 mW power consumption which results in figure of merit (FOM) to be -181.5 dBc/Hz.
Keywords
CMOS integrated circuits; digital phase locked loops; oscillators; CMOS technology; digital phase locked loop; figure of merit; frequency 3.12 GHz to 4.15 GHz; frequency 4 MHz; monotonic digitally controlled oscillator; power 19.2 mW; size 0.18 mum; word length 12 bit; Arrays; CMOS integrated circuits; Capacitance; Equations; Phase noise; Tuning; 0.18 µm CMOS technology; Digitally controlled oscillator; linearity; monotonicity; phase noise; tuning range;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest (MTT), 2011 IEEE MTT-S International
Conference_Location
Baltimore, MD
ISSN
0149-645X
Print_ISBN
978-1-61284-754-2
Electronic_ISBN
0149-645X
Type
conf
DOI
10.1109/MWSYM.2011.5972617
Filename
5972617
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