An efficient voltage-mode class-D power amplifier for digital transmitters with delta-sigma modulation

Author

Woo-Young Kim ; Rode, J. ; Scuderi, A. ; Son, Hyuk-Su ; Park, Chul Soon ; Asbeck, Peter M.

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., KAIST, Daejeon, South Korea

fYear

2011

fDate

5-10 June 2011

Firstpage

1

Lastpage

4

Abstract

A high efficiency voltage-mode class-D power amplifier for digital transmitters with delta-sigma modulation is demonstrated using a 0.13-μm 1.2-V silicon-on-insulator (SOI) CMOS technology. To minimize the overlap of ON time of both the PMOS and the NMOS transistors, a shoot-through current reduction technique was employed. Distortion induced by parasitic inductance was mitigated with integrated on-chip capacitors. The amplifier was tested with periodic signals, envelope delta-sigma modulation (EDSM) signals, and band-pass delta-sigma modulation (BPDSM) signals at 800MHz. Peak drain efficiencies of 75, 62, and 55% were obtained for these inputs, together with ACPR of -60dBc for EDSM EDGE signals and -43dBc for BPDSM CDMA signals.

Keywords

MOSFET circuits; code division multiple access; delta-sigma modulation; network synthesis; power amplifiers; transmitters; frequency 800 MHz; size 0.13 mum; voltage 1.2 V; Baseband; CMOS integrated circuits; CMOS technology; Digital signal processing; Gallium nitride; Multiaccess communication; Wireless communication; CDMA; EDGE; band-pass delta-sigma modulation; envelope delta-sigma modulation; power amplifiers; voltage-mode class-D;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest (MTT), 2011 IEEE MTT-S International

Conference_Location

Baltimore, MD

ISSN

0149-645X

Print_ISBN

978-1-61284-754-2

Electronic_ISBN

0149-645X

Type

conf

DOI

10.1109/MWSYM.2011.5972623

Filename

5972623