• DocumentCode
    2582211
  • Title

    State-preserving vs. non-state-preserving leakage control in caches

  • Author

    Li, Yingmin ; Parikh, Dharmesh ; Zhang, Yan ; Sankaranarayanan, Karthik ; Stan, Mircea ; Skadron, Kevin

  • Author_Institution
    Dept. of Comput. Sci., Virginia Univ., Charlottesville, VA, USA
  • Volume
    1
  • fYear
    2004
  • fDate
    16-20 Feb. 2004
  • Firstpage
    22
  • Abstract
    This paper compares the effectiveness of state-preserving and non-state-preserving techniques for leakage control in caches by comparing drowsy cache and gated-Vss for data caches using 70nm technology parameters. To perform the comparison, we introduce "HotLeakage", a new architectural model for subthreshold and gate leakage that explicitly models the effects of temperature, voltage, and parameter variations, and has the ability to recalculate leakage currents dynamically as temperature and voltage change at runtime due to operating conditions, DVS techniques, etc. By comparing drowsy-cache and gated-Vss at different L2 latencies and different gate oxide thickness values, we are able to identify a range of operating parameters at which gated-Vss is more energy efficient than drowsy-cache, even though gated-Vss does not preserve data in cache lines that have been deactivated. We are also able to show potential further benefits of gated-Vss if an effective dynamic adaptation technique can be found. These results debunk a fairly widespread belief that state-preserving techniques are inherently superior to non-state-preserving techniques.
  • Keywords
    cache storage; electric current control; leakage currents; memory architecture; 70 nm; DVS techniques; HotLeakage; cache lines; data caches; drowsy cache; dynamic adaptation technique; gate leakage; gate oxide thickness; gated-Vss; nonstate-preserving leakage control; operating conditions; parameter variations; state-preserving leakage control; subthreshold; CMOS technology; Gate leakage; Leakage current; Power dissipation; Power generation; Power semiconductor switches; Runtime; Switching circuits; Temperature; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-2085-5
  • Type

    conf

  • DOI
    10.1109/DATE.2004.1268822
  • Filename
    1268822