Title :
A Miniature Q-band CMOS LNA with quadruple-cascode topology
Author :
Yeh, Han-Chih ; Wang, Huei
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
In this paper, a miniature Q-band low noise amplifier (LNA) is fabricated for demonstration using 90-nm Low Power (LP) CMOS technology. The quadruple-cascode topology is applied to achieve a high gain performance with a compact chip size. Besides, a transformer is placed between the cascode devices to reduce the noise figure and enhance the stability and also bandwidth of the LNA. The LNA features a maximum small signal gain of 20.3 dB and a minimum noise figure of 4.6 dB at 40 GHz, with a power consumption of 15 mW. The chip size is only 0.48 × 0.44 mm2, including all the testing pads. To the best of our knowledge, this is the first quadruple-cascode LNA in millimeter-wave (MMW) regime reported to date.
Keywords :
CMOS analogue integrated circuits; low noise amplifiers; millimetre wave amplifiers; network topology; power consumption; transformers; frequency 40 GHz; gain 20.3 dB; low noise amplifier; low power CMOS technology; millimeter-wave regime; miniature Q-band CMOS LNA; noise figure 4.6 dB; noise reduction; power 15 mW; quadruple-cascode LNA; quadruple-cascode topology; size 90 nm; transformer; CMOS integrated circuits; Gain; Inductors; Loss measurement; Noise figure; Topology; CMOS; Low noise amplifier; MMIC; cascode;
Conference_Titel :
Microwave Symposium Digest (MTT), 2011 IEEE MTT-S International
Conference_Location :
Baltimore, MD
Print_ISBN :
978-1-61284-754-2
Electronic_ISBN :
0149-645X
DOI :
10.1109/MWSYM.2011.5972656
