• DocumentCode
    2582817
  • Title

    Can traditional programming bridge the Ninja performance gap for parallel computing applications?

  • Author

    Satish, Nadathur ; Kim, Changkyu ; Chhugani, Jatin ; Saito, Hideki ; Krishnaiyer, Rakesh ; Smelyanskiy, Mikhail ; Girkar, Milind ; Dubey, Pradeep

  • fYear
    2012
  • fDate
    9-13 June 2012
  • Firstpage
    440
  • Lastpage
    451
  • Abstract
    Current processor trends of integrating more cores with wider SIMD units, along with a deeper and complex memory hierarchy, have made it increasingly more challenging to extract performance from applications. It is believed by some that traditional approaches to programming do not apply to these modern processors and hence radical new languages must be discovered. In this paper, we question this thinking and offer evidence in support of traditional programming methods and the performance-vs-programming effort effectiveness of common multi-core processors and upcoming manycore architectures in delivering significant speedup, and close-to-optimal performance for commonly used parallel computing workloads. We first quantify the extent of the “Ninja gap”, which is the performance gap between naively written C/C++ code that is parallelism unaware (often serial) and best-optimized code on modern multi-/many-core processors. Using a set of representative throughput computing benchmarks, we show that there is an average Ninja gap of 24X (up to 53X) for a recent 6-core Intel® Core™ i7 X980 Westmere CPU, and that this gap if left unaddressed will inevitably increase. We show how a set of well-known algorithmic changes coupled with advancements in modern compiler technology can bring down the Ninja gap to an average of just 1.3X. These changes typically require low programming effort, as compared to the very high effort in producing Ninja code. We also discuss hardware support for programmability that can reduce the impact of these changes and even further increase programmer productivity. We show equally encouraging results for the upcoming Intel® Many Integrated Core architecture (Intel® MIC) which has more cores and wider SIMD. We thus demonstrate that we can contain the otherwise uncontrolled growth of the Ninja gap and offer a more stable and predictable performance growth over future archit- ctures, offering strong evidence that radical language changes are not required.
  • Keywords
    C++ language; microprocessor chips; multiprocessing systems; parallel architectures; parallel programming; program compilers; 6-core Intel CoreTM i7 X980 Westmere CPU; C code; C++ code; Intel many integrated core architecture; Ninja code; SIMD units; compiler technology; many-core processors; memory hierarchy; multicore processors; ninja performance gap; parallel computing applications; performance-vs-programming effort effectiveness; programmer productivity; traditional programming; Arrays; Bandwidth; Benchmark testing; Optimization; Parallel processing; Programming;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture (ISCA), 2012 39th Annual International Symposium on
  • Conference_Location
    Portland, OR
  • ISSN
    1063-6897
  • Print_ISBN
    978-1-4673-0475-7
  • Electronic_ISBN
    1063-6897
  • Type

    conf

  • DOI
    10.1109/ISCA.2012.6237038
  • Filename
    6237038