FPGA-based implementation alternatives for keyed-hash message authentication code in networked embedded systems

Field-programmable gate arrays provide a very flexible implementation platform that supports the development of tamper-proof networked embedded systems. In order to achieve a secure mode of operation, many of these systems employ keyed-hash message authentication code, to provide security against intentional tampering. Since this algorithm is of high computational complexity, this paper utilizes various hardware-software co-design techniques for its implementation, and compares the results to standard software. The considered techniques vary in the degree of required design expertise and of how (software) functionalities are implemented in hardware logic.