Title :
Defect tolerance for molecular electronics-based nanofabrics using built-in self-test procedure
Author :
Tehranipoor, Mohammad
Author_Institution :
Dept. of Comput. Sci. & Electr. Eng., Maryland Baltimore County Univ., USA
Abstract :
A BIST procedure is proposed for testing and fault tolerance of molecular electronics-based nanofabrics. The nanofabrics are assumed to include up to 1010 gates: this requires new test strategies that can efficiently test and diagnose the nanofabric in a reasonable time. Our BIST procedure utilizes nanofabric´s components as test pattern generator and response analyzer. The proposed technique tests the components in parallel with a low number of test configurations reducing the test time significantly. Due to high defect density of nanofabrics, a diagnostic procedure needs to be done to achieve a high recovery. A defect database is created to be used by compilers during configuring the nanofabric to avoid defective components. This results in a reliable system constructed using unreliable components.
Keywords :
automatic test pattern generation; built-in self test; fault diagnosis; fault tolerance; integrated circuit reliability; integrated circuit testing; logic testing; molecular electronics; nanoelectronics; built-in self-test procedure; defect database; defect tolerance; diagnostic procedure; high defect density; molecular electronics based nanofabrics; nanofabric diagnosis; response analyzer; test pattern generator; Built-in self-test; Circuit faults; Fault tolerance; Field programmable gate arrays; Logic devices; Manufacturing; Nanoscale devices; Reconfigurable logic; Switches; Testing;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2005. DFT 2005. 20th IEEE International Symposium on
Print_ISBN :
0-7695-2464-8
DOI :
10.1109/DFTVS.2005.27
