DocumentCode :
2584134
Title :
A model of soft error effects in generic IP processors
Author :
Bolchini, C. ; Miele, A. ; Salice, F. ; Sciuto, D.
Author_Institution :
Dipt. di Elettronica e Informazione, Politecnico di Milano, Milan, Italy
fYear :
2005
fDate :
3-5 Oct. 2005
Firstpage :
334
Lastpage :
342
Abstract :
When designing reliability-aware digital circuits, either hardware or software techniques may be adopted to provide a certain degree of failure detection/tolerance, caused by either hardware faults or soft-errors. These techniques are quite well established when working at a low abstraction level, whereas are currently under investigation when moving to higher abstraction levels, in order to cope with the increasing complexity of the systems being designed. This paper presents a model of soft error effects to be adopted when defining software-only techniques to achieve fault detection capabilities. The work identifies on a generic IP processor the misbehaviors caused by soft errors, classifies and analyzes them with respect to the possibility of detecting them by means of previously published approaches. An experimental validation of the proposed model is carried out on the Leon2 processor.
Keywords :
circuit complexity; fault diagnosis; fault tolerance; integrated circuit design; integrated circuit modelling; logic design; microprocessor chips; Leon2 processor; failure detection; failure tolerance; generic IP processors; hardware faults; reliability-aware digital circuits; soft error effects; software-only techniques; Circuit faults; Costs; Digital circuits; Electrical fault detection; Embedded system; Fault detection; Hardware; Power system reliability; Single event upset; Software maintenance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2005. DFT 2005. 20th IEEE International Symposium on
ISSN :
1550-5774
Print_ISBN :
0-7695-2464-8
Type :
conf
DOI :
10.1109/DFTVS.2005.10
Filename :
1544532
Link To Document :
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