DocumentCode :
2584624
Title :
A high frequency, low jitter auto-calibration phase-locked loop with built-in-self-test
Author :
Ali, Sadeka ; Briggs, Gregory ; Margala, Martin
Author_Institution :
Dept. of Electr. & Comput. Eng., Rochester Univ., NY, USA
fYear :
2005
fDate :
3-5 Oct. 2005
Firstpage :
591
Lastpage :
599
Abstract :
A phase-lock loop circuit which reacts to measured jitter by adjusting the VCO input control voltage is described. This self-calibration process alters the VCO response in order to lower the jitter in its 2.4 GHz output for Bluetooth application. As this adjustment takes place, it intrinsically adjusts the VCO output towards the desired operating frequency. The programmable synthesizer has a digitally controlled VCO that provides wide tuning range of 710 MHz. The auto-calibration technique adjusts the manufacture and process variation. The synthesizer, designed in TSMC 0.18-μm technology, has an edge jitter standard deviation of 0.86-ps having a 20% improvement over PLL with no self-calibration.
Keywords :
UHF circuits; built-in self test; calibration; frequency synthesizers; jitter; phase locked loops; programmable circuits; voltage-controlled oscillators; 0.18 micron; 2.4 GHz; 710 MHz; Bluetooth applications; VCO input control voltage; auto-calibration technique; built-in-self-test; edge jitters; high frequency phase-locked loops; low jitter phase-locked loops; programmable synthesizer; self-calibration process; Bluetooth; Circuits; Digital control; Frequency; Jitter; Phase locked loops; Phase measurement; Synthesizers; Voltage control; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2005. DFT 2005. 20th IEEE International Symposium on
ISSN :
1550-5774
Print_ISBN :
0-7695-2464-8
Type :
conf
DOI :
10.1109/DFTVS.2005.8
Filename :
1544559
Link To Document :
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