Gate Electrode Engineering By Control Of Grain Growth For High Performance And High Reliable 0.18/spl mu/m Dual Gate CMOS

Author

Shimizu, S. ; Kuroi, T. ; Sayama, H. ; Furukawa, A. ; Nishida, Y. ; Inoue, Y. ; Inuishi, M. ; Nishimura, T.

Author_Institution

Advanced Technology R&D Center, Mitsubishi Electric Corporation 4-1 Mizuhara, Itami, Hyogo 664, JAPAN

fYear

1997

fDate

10-12 June 1997

Firstpage

107

Lastpage

108

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 1997. Digest of Technical Papers., 1997 Symposium on

Print_ISBN

4-930813-75-1

Type

DOI

10.1109/VLSIT.1997.623718

Filename

623718

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