Title :
A 52GHz Millimeter-Wave PLL Synthesizer for 60GHz WPAN Radio
Author :
Lee, Ja-Yol ; Kim, Haecheon ; Yu, Hyun-Kyu
Author_Institution :
Digital RF SoC Design Team, SoC R&D Group, Daejeon
Abstract :
In this paper, we present the design of 52-GHz frequency synthesizer for 60 GHz WPAN application. The PLL consists of 26 GHz PLL and 52 GHz frequency doubler, generating two channels of output carriers with 2.08 GHz step by using high-speed four-modulus divider. The proposed PLL represents phase noise of - 89 dBc/Hz from 26.2 GHz carrier and - 81 dBc/Hz from 52.4 GHz carrier, at 1 MHz offset, respectively. Also, its integrated RMS phase noise from 1 MHz to 100 MHz is measured as 7.42deg Output frequency tuning range from the PLL is 50 to 53-GHz. The synthesizer including frequency doubler consumes 160 mA at 2.5V supply voltage and occupies 1.2 times 1.0 mm2 chip area.
Keywords :
frequency synthesizers; millimetre wave circuits; personal area networks; phase locked loops; phase noise; WPAN radio; frequency 1 MHz to 100 MHz; frequency 2.08 GHz; frequency 26 GHz; frequency 52 GHz; frequency 60 GHz; frequency doubler; frequency synthesizer; high-speed four-modulus divider; millimeter-wave PLL synthesizer; phase noise; Frequency conversion; Frequency measurement; Frequency synthesizers; Noise measurement; Phase locked loops; Phase measurement; Phase noise; Semiconductor device measurement; Tuning; Voltage;
Conference_Titel :
Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European
Conference_Location :
Amsterdam
Print_ISBN :
978-2-87487-007-1
DOI :
10.1109/EMICC.2008.4772252