Title :
Numerical Modeling of Electrical Resistance of Interconnections in High-Tech Multilayer PCBs Manufactured by Magnetron Sputtering Deposition of Copper
Author :
Borecki, Janusz ; Wymyslowski, Artur
Author_Institution :
Centre for Adv. Technol. of Electron. Interconnections, Tele & Radio Res. Inst., Warsaw
Abstract :
In the paper, authors focus on application of numerical simulation methods along with the experimental measurements to access the electrical resistance of interconnections in PCB (printed circuit board). The comparison of experimental and numerical results allow to define the design rules of interconnection properties and specification of interconnection and technology details depending on the selected application. Additionally, it is believed to allow course prediction of deposition process of conductive layer on via walls, without necessity of performing costly and time consuming experiments. In the paper authors present results and investigations which should lead to manufacture interconnections with aspect ratio (relation of via deep to via diameter) higher than 1, and diameter of via in the range of 25 to 150 mum.
Keywords :
copper; electrical resistivity; integrated circuit interconnections; metallisation; multilayers; printed circuits; sputter deposition; PCB; aspect ratio; conductive layer; electrical resistance; interconnections; magnetron sputtering deposition; numerical simulation; printed circuit board; size 25 mum to 150 mum; Copper; Electric resistance; Electric variables measurement; Electrical resistance measurement; Integrated circuit interconnections; Magnetic multilayers; Numerical models; Numerical simulation; Sputtering; Virtual manufacturing;
Conference_Titel :
Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems, 2007. EuroSime 2007. International Conference on
Conference_Location :
London
Print_ISBN :
1-4244-1105-X
Electronic_ISBN :
1-4244-1106-8
DOI :
10.1109/ESIME.2007.360006