DocumentCode
2586144
Title
20 GHz Power Amplifier Design in 130 nm CMOS
Author
Ferndahl, Mattias ; Johansson, Ted ; Zirath, Herbert
Author_Institution
Dept. of Micro Technol. & Nano Sci., Chalmers Univ. of Technol., Goteborg
fYear
2008
fDate
27-28 Oct. 2008
Firstpage
254
Lastpage
257
Abstract
Five different 20 GHz power amplifiers in 130 nm CMOS technology have been designed and characterized. The power amplifiers explore single versus cascode configuration, smaller versus larger transistor sizes, as well as the combination of two amplifiers using power splitters/combiners. A maximum output power of 63 mW at 20 GHz was achieved. Transistor level characterization using load pull measurements on 1 mm gate width transistors yielded 148 mW output power. These numbers are, to the authors´ knowledge, the highest reported for CMOS above 10 GHz. Transistor modeling and layout for power amplifiers are also discussed.
Keywords
CMOS integrated circuits; power amplifiers; power combiners; transistors; CMOS technology; frequency 20 GHz; power 148 mW; power 63 mW; power amplifier design; power splitters-combiners; size 130 nm; transistor modeling; CMOS technology; Copper; Distributed amplifiers; Energy consumption; Gain; Millimeter wave technology; Packaging; Passivation; Power amplifiers; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European
Conference_Location
Amsterdam
Print_ISBN
978-2-87487-007-1
Type
conf
DOI
10.1109/EMICC.2008.4772277
Filename
4772277
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