Title :
Striking a new balance in the nanometer era: first-time-right and time-to-market demands versus technology challenges
Author_Institution :
IBM Syst. & Technol. Group, IBM, USA
Abstract :
Summary form only given. Today\´s semiconductor marketplace demands nanometer designs of unprecedented complexity and performance, with uncompromising time-to-market requirements. This drives a focus on predictable, high-quality design results despite the challenges associated with these next-generation technologies. This scenario is complicated even further by the need to address these challenges across a wide spectrum of products, ranging from high-frequency processor designs to extremely complex ASIC designs. In the nanometer era, the common factor for ensuring market leadership across this broad variety of products is achieving single-pass design success to avoid costly re-spins and the loss of market opportunities: design turnaround time must be minimized without compromising design efficiency and first-time-right requirements. Design automation tools must balance both requirements, while providing designers with information that enables them to "design around" potential trouble spots in both today\´s and tomorrow\´s environment to ensure an exceptional level of built-in quality. The article highlights some of the innovations IBM is developing, such as variation-aware and statistical timing, faster serial and parallel processing, more highly integrated data models and tools, and concurrent chip and package design, which optimise the competing requirements of simultaneously reducing design turnaround time and achieving single-pass design success, while effectively managing the technical challenges associated with nanometer designs.
Keywords :
circuit complexity; design for manufacture; design for quality; electronic design automation; integrated circuit design; integrated circuit packaging; integrated circuits; market opportunities; nanotechnology; ASIC designs; chip design; complexity; design automation tools; design turnaround time; first-time-right design; high-frequency processor designs; integrated data models; market leadership; nanometer era; package design; parallel processing; semiconductor marketplace; serial processing; single-pass design; statistical timing; technology challenges; time-to-market requirements; variation-aware timing; Application specific integrated circuits; Data models; Design automation; Market opportunities; Packaging; Parallel processing; Process design; Technological innovation; Time to market; Timing;
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
Print_ISBN :
0-7695-2288-2
DOI :
10.1109/DATE.2005.283