DocumentCode :
2586473
Title :
Efficient Parallel Embedded Computing through Look-Ahead Configured Dynamic Inter-Processor Connections
Author :
Laskowski, Eryk ; Tudruj, Marek
Author_Institution :
Inst. of Comput. Sci., Polish Acad. of Sci., Ordona
fYear :
2006
fDate :
13-17 Sept. 2006
Firstpage :
202
Lastpage :
207
Abstract :
A new kind of the look-ahead reconfigurable multiprocessor embedded systems together with the necessary program structuring algorithms are presented and discussed. The new system architecture for execution of dedicated parallel programs is based on the look-ahead dynamic reconfiguration of inter-processor connections in redundant network resources such as multiple connection crossbar switches and partitioned processor communication link sets. The discussed approach enables reducing inter-processor connection reconfiguration time overheads, which is particularly important in modern parallel systems based on user-level communication. Automatic program structuring methods for the assumed system architecture are proposed. Experimental results with structuring of parallel numerical programs (Strassen matrix multiplication) are reported. The experiments compare the strategies of the look ahead connection reconfiguration based on the use of multiple crossbar switches with the strategy of providing processors with larger sets of communication links partitioned into a subset used for current program execution and a subset used for anticipated connection setting
Keywords :
embedded systems; matrix multiplication; message passing; multiprocessing systems; parallel architectures; parallel programming; reconfigurable architectures; Strassen matrix multiplication; crossbar switch; inter-processor connection; look-ahead dynamic reconfigurable multiprocessor embedded system; parallel embedded computing; parallel program; program structuring algorithm; system architecture; Communication switching; Communication system control; Computer science; Control systems; Embedded computing; Embedded system; Hardware; Information technology; Multiprocessing systems; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Computing in Electrical Engineering, 2006. PAR ELEC 2006. International Symposium on
Conference_Location :
Bialystok
Print_ISBN :
0-7695-2554-7
Type :
conf
DOI :
10.1109/PARELEC.2006.32
Filename :
1698661
Link To Document :
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