Title :
Asynchronous Combo 4/8/12bit, 140MS/s, 0.12mm2 ADC with binary tree structure
Author :
Petrellis, Nikos ; Birbas, Michael ; Kikidis, John ; Birbas, Alexios
Author_Institution :
Analogies S.A., Platani, Greece
Abstract :
A configurable asynchronous CMOS TSMC90 nm Analogue to Digital Converter (ADC) with 4, 8 or 12-bits resolution, using a binary tree structure is presented which needs very low silicon area and relatively low power consumption for its implementation. The sampling rate of the 12-bit ADC exceeds 140MS/s and requires only 0.12 mm2 of area making it appropriate for ultra wideband time-interleaved parallel ADC architectures.
Keywords :
CMOS integrated circuits; analogue-digital conversion; asynchronous combo; binary tree structure; complementary metal-oxide-semiconductor; configurable asynchronous CMOS; ultra wideband time-interleaved parallel ADC architecture; Analog-digital conversion; Binary trees; Circuits; Costs; Energy consumption; Low voltage; Pipelines; Sampling methods; Silicon; Ultra wideband technology;
Conference_Titel :
Emerging Technologies & Factory Automation, 2009. ETFA 2009. IEEE Conference on
Conference_Location :
Mallorca
Print_ISBN :
978-1-4244-2727-7
Electronic_ISBN :
1946-0759
DOI :
10.1109/ETFA.2009.5347207
