An Optimum Cascode Topology for High Gain Micro/Millimeter Wave CMOS Amplifier Design

Author

Nezhad-Ahmadi, Mohammad-Reza ; Biglarbegian, Behzad ; Mirzaei, Hassan ; Safavi-Naieini, Safieddin

Author_Institution

Dept. of Electr. Eng., Univ. of Waterloo, Waterloo, ON

fYear

2008

fDate

27-28 Oct. 2008

Firstpage

394

Lastpage

397

Abstract

An optimum gate-loaded cascode topology for maximizing the gain of a stable CMOS amplifier in micro/millimeter wave band is presented. By adding a piece of transmission line in the gate of cascode transistor, choosing an appropriate matching circuit that includes biasing, and exploiting the proper transmission line structure the gain per stage of CMOS amplifier can be increased and an optimum design can be achieved. Based on this topology a 28 GHz amplifier in 0.18 mum CMOS technology has been designed and fabricated. Gain of about 16 dB was measured for a two-stage cascode at 28 GHz in a 0.18 mum CMOS technology.

Keywords

CMOS integrated circuits; MMIC amplifiers; field effect MIMIC; field effect MMIC; millimetre wave amplifiers; transmission lines; cascode transistor; frequency 28 GHz; matching circuit; microwave CMOS amplifier; millimeter wave CMOS amplifier design; optimum gate-loaded cascode topology; size 0.18 mum; transmission line; CMOS technology; Circuit topology; Distributed parameter circuits; Isolation technology; Microwave amplifiers; Microwave technology; Microwave transistors; Millimeter wave technology; Millimeter wave transistors; Power transmission lines;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European

Conference_Location

Amsterdam

Print_ISBN

978-2-87487-007-1

Type

conf

DOI

10.1109/EMICC.2008.4772312

Filename

4772312