Effect of variations in fin thickness and self-heating on FinFETs

Author

Varghese, Bibin ; Sruthi, G.S. ; Kumar, V. Vinod ; Kumar, U. Sajesh

Author_Institution

Dept. of Electron. & Commun. Eng., Gov. Coll. of Eng. Kannur, Kannur, India

fYear

2014

fDate

17-18 Dec. 2014

Firstpage

111

Lastpage

115

Abstract

In this work, we have studied Effect of Variations in Different Dimensions and self-heating on FinFET Output characteristics and Lattice Temperature. In the sub 26 nm regime conventional planar MOSFET scaling has been facing problems such as threshold voltage lowering, sub-threshold swing (SS) degradation, drain-induced barrier lowering (DIBL), random dopant fluctuations, leakage increase due to dielectric tunnelling, and problem of increased self-heating due to the increase in thermal resistance. Effect of Variations in Fin Thickness and self-heating on FinFETs Output characteristics and Lattice temperature will be step for designing more sophisticated and efficient FinFETs.

Keywords

MOSFET; DIBL; FinFET output characteristics; dielectric tunnelling; drain-induced barrier lowering; fin thickness variations; lattice temperature; planar MOSFET scaling; random dopant fluctuations; self-heating FinFET; sub-threshold swing degradation; thermal resistance; threshold voltage; Doping; FinFETs; Lattices; Logic gates; Silicon; Standards; Temperature; BTBT; Band To Band Tunnelling; Bulk; DIBL; Drain Induced Barrier Lowering; FinFET; GIDL; Lattice temperature; SHE; SOI; SS; Sub-threshold Swing; gate Induced Drain Leakage; self-heating;

fLanguage

English

Publisher

ieee

Conference_Titel

Computational Systems and Communications (ICCSC), 2014 First International Conference on

Conference_Location

Trivandrum

Print_ISBN

978-1-4799-6012-5

Type

conf

DOI

10.1109/COMPSC.2014.7032631

Filename

7032631