• DocumentCode
    2587051
  • Title

    Implementation of a control strategy for PFC with FPGA

  • Author

    Alcalde, André L P ; D´aquino, Felipe M. ; Mohr, Hari B. ; Mussa, Samir A.

  • Author_Institution
    Fed. Univ. of Santa Catarina, Florianopolis
  • fYear
    2007
  • fDate
    2-5 Sept. 2007
  • Firstpage
    1
  • Lastpage
    9
  • Abstract
    This paper presents the study and implementation of a single-phase pre-regulator rectifier with digital control using the FPGA technology. The control technique used aims to obtain power factor correction (PFC) based on average current mode control. The rectifier is a single-phase voltage doubler with a center tap at the voltage output. The FPGA used in the project is an ALTERAreg Cyclone II EP2C35F672C6, present on the kit DE2, which is a low-cost FPGA with low-consumption at a great speed. The output power of prototype implemented was around 1000 W. In this project it was just considered the use of the current loop, in other words, just the control of the input current was implemented. The regulation of the output voltages was implemented in another paper using DSP, according to [4].
  • Keywords
    digital control; electric current control; field programmable gate arrays; power factor correction; rectifiers; voltage control; current mode control; digital control; field programmable gate arrays; power factor correction; single-phase pre-regulator rectifier; voltage doubler; Capacitors; Digital signal processing; Diodes; Field programmable gate arrays; Frequency; Power factor correction; Rectifiers; Switches; Switching converters; Voltage; Converter control; FPGA; Power factor correction; Power supply;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics and Applications, 2007 European Conference on
  • Conference_Location
    Aalborg
  • Print_ISBN
    978-92-75815-10-8
  • Electronic_ISBN
    978-92-75815-10-8
  • Type

    conf

  • DOI
    10.1109/EPE.2007.4417739
  • Filename
    4417739