DocumentCode
2587052
Title
Low cost task migration initiation in a heterogeneous MP-SoC
Author
Nollet, V. ; Avasare, P. ; Mignolet, J.-Y. ; Verkest, D.
Author_Institution
IMEC, Leuven, Belgium
fYear
2005
fDate
7-11 March 2005
Firstpage
252
Abstract
Run-time task migration in a heterogeneous multiprocessor system-on-chip (MP-SoC) is a challenge that requires cooperation between the task and the operating system. In task migration, minimization of the overhead during normal task execution (i.e., when not migrating) and the minimization of the migration reaction time are important. We introduce a novel technique that reuses the processor´s debug registers in order to minimize the overhead during normal execution. This paper explains our task migration proof-of-concept setup and compares it to the state-of-the art. By reusing existing hardware and software functionality our approach reduces the run time overhead.
Keywords
computer debugging; multiprocessing systems; system-on-chip; heterogeneous MP-SoC; low cost task migration initiation; migration reaction time; multiprocessor system-on-chip; overhead minimization; processor debug register reuse; run-time task migration; Art; Costs; Dynamic voltage scaling; Hardware; Multiprocessing systems; Operating systems; Registers; Resource management; Runtime; Thermal management;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2005. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2288-2
Type
conf
DOI
10.1109/DATE.2005.201
Filename
1395565
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