DocumentCode :
2587144
Title :
MINLP based topology synthesis for delta sigma modulators optimized for signal path complexity, sensitivity and power consumption
Author :
Tang, Hua ; Wei, Ying ; Doboli, Alex
Author_Institution :
Dept. of Electr. & Comput. Eng., State Univ. of New York, Stony Brook, NY, USA
fYear :
2005
fDate :
7-11 March 2005
Firstpage :
264
Abstract :
The paper proposes a novel architecture synthesis algorithm for single-loop single-bit ΔΣ modulators. We defined a generic modulator architecture and derived its noise and signal transfer function (NTF/STF) in symbolic forms. We then used the TF in MINLP (mixed integer nonlinearly constrained programming) to generate optimal topologies for a variety of design requirements, such as modulator complexity, sensitivity and power consumption, which appeared as cost functions. Experiments show the superiority of the synthesized topologies as compared to traditional solutions.
Keywords :
circuit CAD; circuit complexity; delta-sigma modulation; high level synthesis; integrated circuit layout; mixed analogue-digital integrated circuits; network topology; power consumption; sensitivity; transfer functions; SoC; analog-mixed-signal high-level synthesis; architecture synthesis algorithm; cost functions; mixed integer nonlinearly constrained programming; modulator architecture; modulator complexity; noise transfer function; power consumption; sensitivity; signal path complexity; signal transfer function; single-loop single-bit delta sigma modulators; system-on-chip; topology synthesis; Cost function; Delta modulation; Delta-sigma modulation; Energy consumption; Functional programming; Modulation coding; Power generation; Signal synthesis; Topology; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 2005. Proceedings
ISSN :
1530-1591
Print_ISBN :
0-7695-2288-2
Type :
conf
DOI :
10.1109/DATE.2005.207
Filename :
1395568
Link To Document :
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