Generalized hysteresis current controller for three-level inverter topologies

This paper analyzes the generalized hysteresis current control algorithm for three level inverter topologies. The inverter topologies considered are H-bridge, diode clamped and capacitor clamped three level inverters. It is shown that the switching frequency for the proposed hysteresis algorithm can be estimated using an empirical relation. The algorithm can be directly implemented for the H-bridge and diode clamped three-level inverter, however a pre-charged capacitor is required for the inner capacitor in case of the capacitor clamped three-level inverter. The averaged modulator dynamics of the proposed controller has been derived that is used to analyze the performance of the current control loop. The results are verified using PSCAD/EMTDC simulation studies. Experimental results are obtained for the H-bridge inverter to validate the proposed control algorithm and its performance.