Title :
Design of graphics processing unit for image processing
Author :
Panappally, J. George Cherian ; Dhanesh, M.S.
Author_Institution :
Dept. of Electron. & Commun., Rajagiri Sch. of Eng. & Technol., Cochin, India
Abstract :
This work describes the designing of a Graphics Processing unit that deals with image processing. Graphics Processing Unit (GPU) is an important factor when it comes to large computing. Images and videos that are having large data can be processed efficiently in GPU by exploiting its feature of parallel execution. Digital image processing implemented on hardware provides higher processing speed and performance. The use of Verilog HDL for the design of GPU provides an immediate implementation possibility. The paper focuses on image processing operations like Brightness manipulation, Contrast manipulation, image cropping, image zooming, image rotation and morphological operators such as Dilation and Erosion.
Keywords :
graphics processing units; hardware description languages; image processing; parallel processing; GPU; Verilog HDL; brightness manipulation; contrast manipulation; digital image processing; graphics processing unit design; image cropping; image rotation; image zooming; morphological operators; parallel execution; Brightness; Field programmable gate arrays; Graphics processing units; Hardware; Hardware design languages; Image processing; Registers; FPGA; GPU; Processing element; Verilog HDL;
Conference_Titel :
Computational Systems and Communications (ICCSC), 2014 First International Conference on
Conference_Location :
Trivandrum
Print_ISBN :
978-1-4799-6012-5
DOI :
10.1109/COMPSC.2014.7032666
