SiGe:C BiCMOS technology with 3.6 ps gate delay

Author

Rucker, H. ; Heinemann, B. ; Barth, R. ; Bolze, D. ; Drews, J. ; Haak, U. ; Hoppner, W. ; Knoll, D. ; Kopke, K. ; Marschmeyer, S. ; Richter, H.H. ; Schley, P. ; Schmidt, D. ; Scholz, R. ; Tillack, B. ; Winkler, W. ; Wulf, H.-E. ; Yamamoto, Y.

Author_Institution

IHP, Frankfurt, Germany

fYear

2003

fDate

8-10 Dec. 2003

Abstract

A high-speed SiGe:C HBT technology is presented that combines a new extrinsic base construction with a low-resistance collector design to simultaneously minimize base and collector resistances and base-collector capacitance. A ring oscillator delay of 3.6 ps per stage was achieved. To our knowledge, this is the shortest gate delay reported to date for a SiGe technology. The HBTs demonstrate an f/sub T/ of 190 GHz, an f/sub max/ of 243 GHz, and a BV/sub CEO/ of 1.9 V at an drawn emitter size of 0.175/spl times/0.84 /spl mu/m/sup 2/. The high-speed HBT module has been integrated in a 0.25 /spl mu/m CMOS platform.

Keywords

BiCMOS integrated circuits; Ge-Si alloys; carbon; heterojunction bipolar transistors; millimetre wave bipolar transistors; semiconductor materials; 0.175 micron; 0.25 micron; 0.84 micron; 1.9 V; 190 GHz; 243 GHz; 3.6 ps; BiCMOS technology; SiGe:C; base-collector capacitance; extrinsic base construction; gate delay; high-speed HBT technology; low-resistance collector; ring oscillator delay; BiCMOS integrated circuits; Breakdown voltage; Delay; Epitaxial growth; Germanium silicon alloys; Heterojunction bipolar transistors; Ion implantation; Manufacturing; Silicon germanium; Wet etching;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7872-5

Type

conf

DOI

10.1109/IEDM.2003.1269180

Filename

1269180